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Packaging Engineer at Ayar Labs
Santa Clara, CA, US

The successful Packaging Engineer will be responsible for driving package development for Ayar Labs products, taking the design from concept to production. Responsibilities include specification, design, supplier interface, and reliability. Work as a part of a small team in a dynamic startup environment, driving package design and optimizing for: thermal, mechanical, electrical, and optical requirements. The ideal candidate is a hands-on self-starter who is able to develop and complete work based on input from colleagues, and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.

  • BS, MS or PhD in Mechanical Engineering, Electrical Engineering, Materials Science and Engineering, or equivalent skills and/or experience;
  • Experience with advanced microelectronics packaging, MCM, 2.5D, 3D, etc., including ceramic and organic package substrate, substrate design, flip chip, CUF, etc.;
  • Experience collaborating with assembly service providers;
  • Experience in processes and materials development, design of experiment,  
The Ideal Candidate Would Also Have
  • Experience in Finite Element Analysis, including thermal, mechanical, and CFD modeling and analysis;
  • Advanced microelectronic packaging experience, or; fiber optic or photonic package experience;
  • Proficiency with ANSYS FEA, or other FEA tools;
  • Experience with high speed SerDes packaging;
  • Knowledge of signal integrity and power integrity;
  • 5+ years of experience in packaging

About Ayar Labs
At Ayar Labs we are lighting up electronics for a brighter future. With our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with brilliant people on challenging, paradigm-shifting work. Our optical I/O technology removes the bottlenecks created by today’s electrical I/O, making it possible to continue the computing system performance scaling that Moore’s Law enabled until now. We have a commitment to win big in the marketplace based on the strengths of our technology, and we approach everything with an eye to massive scalability. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to achieve big wins, leveraging our patent portfolio which promises products that deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. We offer a comprehensive benefits plan designed to keep our team healthy and happy.