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Power Integrity Engineer at Ayar Labs
Santa Clara, CA, US
You will be responsible for high-speed serial interface signal integrity and power integrity for Ayar Labs electro-optics chiplets covering the span from chiplet, package to board. Prior design and modeling experience with 25G SerDes, and PCIe is a plus.

Essential Functions:

Power integrity:
• Power delivery modeling, simulation, and characterization for die, package, board, and Voltage Regulator
• Responsible for on-die/package/board power delivery for current and future generations
• Define the power architecture and design solution space for the target system
• Provide implementation guidelines and feedback to silicon, package, and system design group
• Perform feasibility study, design verification, and sign off
• Perform model to hardware correlation on component and product/system level

Basic Qualifications:
• PhD or M.S. in Electrical Engineering, Physics, or related experience in Electromagnetics
• 5 years experience working with product package/board design and analysis, SI/PI methodology development, and lab correlation/validation of the simulation results
• Familiarity with lab equipment, such as: VNA, TDR, real-time scope, spectrum analyzer, etc
• Possess strong fundamentals in 3D/2D EM simulation tools and transmission line theory
• Good communication skills

Preferred Qualifications:
Prior design and modeling experience with 25G SerDes, and PCIe is a plus.


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About Ayar Labs
At Ayar Labs we’re about to revolutionize computing by moving data with light.  We’re unleashing processing power for artificial intelligence, high performance computing, and telecommunications by removing the bottlenecks created by today’s electrical I/O -- making it possible to continue scaling computing system performance.  Ayar Labs is the first to deliver in-package optical I/O chiplets, a new universal I/O solution that replaces traditional electrical I/O and enables chips to communicate with each other from millimeters to kilometers, to deliver orders of magnitude improvements in latency, bandwidth density, and power consumption.

With our strong collaborations with industry leaders and government, our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with renowned experts on challenging, paradigm-shifting work.

We are passionate about delivering in-package optical I/O at scale, leveraging the strength of our patent portfolio and our team of leading interdisciplinary experts.  We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to drive innovation and achieve big wins.   Join our team and experience the possibilities.

Resources:

Executives from Intel and GLOBALFOUNDRIES share their thoughts on Ayar Labs and the promise of in-package optical I/O (video)
Ayar Labs in the News and Recent announcements
 LinkedIn and Twitter